janwas
2e5d9452aa
move all except user-specified config choices out of config.h and into appropriate headers CPU_IA32 -> ARCH_IA32 wsdl: disable use of ddraw (will soon be replaced by WMI) use shared_ptr without namespace qualifier (it's in tr1) debug_warn -> debug_assert(0) LIB_API to allow building as DLL smart pointers: reduce use of .get() cache_adt: use map instead of hash_map (avoids needing a hashCompare class). also remove spurious warning code_annotation.h: better cassert implementation move FPS measuring portion of timer.cpp into frequency_filter move include of memory headers into mmgr.h (to avoid errors, we must ensure they are included if mmgr is used) posix_filesystem.h: move definition of mkdir to wfilesystem stl: disable iterator checks in release mode wmi: fix COM init bug, use smart pointers wutil: add code to get DLL module handle (if compiled as such), add WinScopedLock timer: fix handling of raw ticks This was SVN commit r5517.
183 lines
5.0 KiB
C++
183 lines
5.0 KiB
C++
/**
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* =========================================================================
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* File : cpu.h
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* Project : 0 A.D.
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* Description : CPU and memory detection.
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* =========================================================================
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*/
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// license: GPL; see lib/license.txt
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#ifndef INCLUDED_CPU
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#define INCLUDED_CPU
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namespace ERR
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{
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const LibError CPU_FEATURE_MISSING = -130000;
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const LibError CPU_UNKNOWN_OPCODE = -130001;
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const LibError CPU_UNKNOWN_VENDOR = -130002;
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const LibError CPU_RESTRICTED_AFFINITY = -130003;
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}
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// (some of these functions may be implemented in external asm files)
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#ifdef __cplusplus
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extern "C" {
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#endif
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//-----------------------------------------------------------------------------
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// CPU detection
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/**
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* @return string identifying the CPU (usually a cleaned-up version of the
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* brand string)
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**/
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extern const char* cpu_IdentifierString();
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/**
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* @return a rough estimate of the CPU clock frequency.
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*
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* note: the accuracy of this value is not important. while it is used by
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* the TSC timing backend, thermal drift is an issue that requires
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* continual recalibration anyway, which makes the initial accuracy moot.
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* querying frequency via OS is also much faster than ia32's measurement loop.
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**/
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extern double cpu_ClockFrequency();
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/**
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* @return the number of what the OS deems "processors" or -1 on failure.
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*
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* this is used by ia32 when it cannot determine the number via APIC IDs.
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* in other situations, the cpu_NumPackages function is preferable since
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* it is more specific.
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*
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* note: this function is necessary because POSIX sysconf _SC_NPROCESSORS_CONF
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* is not suppored on MacOSX, else we would use that.
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**/
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extern uint cpu_NumProcessors();
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/**
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* @return number of *enabled* CPU packages / sockets.
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**/
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extern uint cpu_NumPackages();
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/**
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* @return number of *enabled* CPU cores per package.
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* (2 on dual-core systems)
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**/
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extern uint cpu_CoresPerPackage();
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/**
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* @return number of *enabled* hyperthreading units per core.
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* (2 on P4 EE)
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**/
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extern uint cpu_LogicalPerCore();
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/**
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* @return the size [bytes] of a MMU page.
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* (4096 on most IA-32 systems)
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**/
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extern size_t cpu_PageSize();
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enum CpuMemoryIndicators
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{
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CPU_MEM_TOTAL,
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CPU_MEM_AVAILABLE
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};
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/**
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* @return the amount [bytes] of available or total physical memory.
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**/
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extern size_t cpu_MemorySize(CpuMemoryIndicators mem_type);
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//-----------------------------------------------------------------------------
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// lock-free support routines
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/**
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* atomic "compare and swap".
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*
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* @param location address of the word to compare and possibly overwrite
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* @param expected its expected value
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* @param newValue the value with which to replace it
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* @return false if the target word doesn't match the expected value,
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* otherwise true (also overwriting the contents of location)
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**/
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extern bool cpu_CAS(volatile uintptr_t* location, uintptr_t expected, uintptr_t newValue);
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/**
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* add a signed value to a variable without the possibility of interference
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* from other threads/CPUs.
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**/
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extern void cpu_AtomicAdd(volatile intptr_t* location, intptr_t increment);
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/**
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* enforce strict instruction ordering in the CPU pipeline.
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**/
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extern void cpu_Serialize();
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/**
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* enforce strong memory ordering.
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**/
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extern void cpu_MemoryFence();
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//-----------------------------------------------------------------------------
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// misc
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/**
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* drop-in replacement for libc memcpy(). highly optimized for Athlon and
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* Pentium III microarchitectures; significantly outperforms VC7.1 memcpy and
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* memcpy_amd. for details, see accompanying article.
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**/
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extern void* cpu_memcpy(void* RESTRICT dst, const void* RESTRICT src, size_t size);
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/**
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* execute the specified function once on each CPU.
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* this includes logical HT units and proceeds serially (function
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* is never re-entered) in order of increasing OS CPU ID.
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* note: implemented by switching thread affinity masks and forcing
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* a reschedule, which is apparently not possible with POSIX.
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*
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* may fail if e.g. OS is preventing us from running on some CPUs.
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**/
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typedef void (*CpuCallback)(void* param);
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extern LibError cpu_CallByEachCPU(CpuCallback cb, void* param);
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/**
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* set the FPU control word to "desirable" values (see implementation)
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**/
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extern void cpu_ConfigureFloatingPoint();
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// convert float to int much faster than _ftol2, which would normally be
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// used by (int) casts.
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// should we use our float->int code? newer GCC versions with -ffast-math and
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// VC8 can use SSE, so skip it there.
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#if ARCH_IA32 && MSC_VERSION && MSC_VERSION < 1400
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#define cpu_i32FromFloat(f) ((i32)f)
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#define cpu_i32FromDouble(d) ((i32)d)
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#define cpu_i64FromDouble(d) ((i64)d)
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#else
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extern i32 cpu_i32FromFloat(float f);
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extern i32 cpu_i32FromDouble(double d);
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extern i64 cpu_i64FromDouble(double d);
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#endif
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#ifdef __cplusplus
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}
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#endif
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/**
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* specialization of cpu_CAS for pointer types. this avoids error-prone
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* casting in user code.
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**/
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template<typename T>
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bool cpu_CAS(volatile T* location, T expected, T new_value)
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{
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return cpu_CAS((volatile uintptr_t*)location, (uintptr_t)expected, (uintptr_t)new_value);
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}
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#endif // #ifndef INCLUDED_CPU
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