128 lines
3.9 KiB
C++
128 lines
3.9 KiB
C++
/* Copyright (c) 2010 Wildfire Games
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/*
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* CPU and memory detection.
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*/
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#ifndef INCLUDED_CPU
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#define INCLUDED_CPU
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#include "lib/sysdep/compiler.h"
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namespace ERR
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{
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const LibError CPU_FEATURE_MISSING = -130000;
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const LibError CPU_UNKNOWN_OPCODE = -130001;
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const LibError CPU_UNKNOWN_VENDOR = -130002;
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}
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//-----------------------------------------------------------------------------
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// CPU detection
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/**
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* @return string identifying the CPU (usually a cleaned-up version of the
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* brand string)
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**/
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LIB_API const char* cpu_IdentifierString();
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//-----------------------------------------------------------------------------
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// lock-free support routines
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/**
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* prevent the CPU from reordering previous loads or stores past the barrier,
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* thus ensuring they retire before any subsequent memory operations.
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* this also prevents compiler reordering.
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**/
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#if MSC_VERSION
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# include <intrin.h>
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# if !ICC_VERSION
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# pragma intrinsic(_ReadWriteBarrier)
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# endif
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# define cpu_MemoryBarrier() _ReadWriteBarrier()
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#elif GCC_VERSION
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# define cpu_MemoryBarrier() asm volatile("" : : : "memory")
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#else
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# define cpu_MemoryBarrier()
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#endif
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/**
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* atomic "compare and swap".
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*
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* @param location address of the word to compare and possibly overwrite
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* @param expected its expected value
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* @param newValue the value with which to replace it
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* @return false if the target word doesn't match the expected value,
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* otherwise true (also overwriting the contents of location)
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**/
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LIB_API bool cpu_CAS(volatile uintptr_t* location, uintptr_t expected, uintptr_t newValue);
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/**
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* specialization of cpu_CAS for pointer types. this avoids error-prone
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* casting in user code.
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**/
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template<typename T>
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bool cpu_CAS(volatile T* location, T expected, T new_value)
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{
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return cpu_CAS((volatile uintptr_t*)location, (uintptr_t)expected, (uintptr_t)new_value);
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}
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/**
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* add a signed value to a variable without the possibility of interference
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* from other threads/CPUs.
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**/
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LIB_API void cpu_AtomicAdd(volatile intptr_t* location, intptr_t increment);
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/**
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* enforce strict instruction ordering in the CPU pipeline.
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**/
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LIB_API void cpu_Serialize();
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//-----------------------------------------------------------------------------
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// misc
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/**
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* drop-in replacement for POSIX memcpy().
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**/
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LIB_API void* cpu_memcpy(void* RESTRICT dst, const void* RESTRICT src, size_t size);
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/**
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* set the FPU control word to "desirable" values (see implementation)
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**/
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LIB_API void cpu_ConfigureFloatingPoint();
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// convert float to int much faster than _ftol2, which would normally be
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// used by (int) casts.
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// VC8 and GCC with -ffast-math now manage to generate SSE instructions,
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// so our implementation is no longer needed.
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#define cpu_i32FromFloat(f) ((i32)(f))
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#define cpu_i32FromDouble(d) ((i32)(d))
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#define cpu_i64FromDouble(d) ((i64)(d))
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#endif // #ifndef INCLUDED_CPU
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